FPGA Engineer – Optical Link

Role Overview

We are seeking a FPGA Design Engineer to develop our next-generation Optical Communication Head. This role sits at the intersection of high-speed digital communications and precision motion control. You will be responsible for developing the “brain” of our terminal—implementing the algorithms that keep our laser locked on target and the data flowing at maximum throughput.

Key Responsibilities

• Tracking & Acquisition: Design and implement high-speed DSP blocks to process inputs from CMOS sensors; implement PID or Kalman filter-based control loops.
• Data Encoding & Framing: Develop the transmit/receive path and Forward Error Correction (Reed-Solomon, LDPC).
• High-Speed Interfacing: Configure and optimize FPGA for optical links.
• System Integration: Interface with high-speed ADCs/DACs and manage low-latency communication between the FPGA fabric.
• Verification: Conduct bit-accurate simulations and hardware-in-the-loop (HIL) testing to ensure link reliability under atmospheric turbulence conditions.

Qualifications

Minimum Education

• Bachelor’s degree in:
  • Telecommunications Engineering
  • Electronics Engineering
• Master’s degree is a plus.

Required Skills

• Knowledge  in Verilog.
• Comms Protocols: Deep understanding of the physical layer (PHY), clock recovery, and synchronization techniques.
• DSP for Control: experience implementing digital filters and closed-loop control systems in fixed-point logic.
• Hardware Platforms: Experience with the most common FPGA in the market
• Tools: Proficiency in Vivado/Quartus, MATLAB/Simulink (for algorithm modeling), and Python for scripting/testing.